(1) Field of the Invention
The present invention relates to a crosspoint switch circuit and a switch cell electronic circuit, and more particularly the present invention relates to a crosspoint switch circuit and a switch cell electronic circuit suitable for use in a channel switching function unit necessary for a transmitting apparatus (e.g., an optical cross-connect apparatus or an optical ADM (Add Drop Multiplexer) or the like) utilized on an optical network using WDM (Wavelength Division Multiplex) technology.
(2) Description of the Related Art
Recently, as is represented by the Internet, demand in communication is dramatically increasing. In order to cope with the increase of demand in communication, it becomes indispensable to build a photonic network having a great amount of capacity capable of transmitting a signal at an ultrahigh bit-rate (e.g., ten gigabit to about terabit in the future) using the WDM technology, as is shown schematically in FIG. 21, for example. When such a photonic network is built, the optical cross-connect apparatus (OXC) or the optical ADM are utilized in general.
The optical cross-connect apparatus (OXC) is an apparatus useful for receiving a WDM signal and capable of generating (cross-connect) any channel signal in the unit of wavelength (channel) (see FIG. 22). The optical ADM is an apparatus for carrying out Add/Drop/Through control in the unit of channel on the received WDM signal, whereby an optical signal on a certain channel transmitted from a desired network is inserted (added) to a main channel signal, an optical signal on a certain channel is extracted from the main channel signal and branched (dropped) to the desired network, and an optical signal on a certain channel in the main channel is sent through the apparatus without any drop operation (see FIG. 23).
Therefore, if the optical cross-connect apparatus or the optical ADM are provided in a desired area upon request as shown in FIGS. 22 and 23, then signals transmitted in any network such as a transmission network of SDH (Synchronous Digital Hierarchy), SONET (Synchronous Optical Network), ATM (Asynchronous Transfer Mode) or the like can be transmitted in a form of optical signal at a high bit-rate to a desired network in the unit of channel. Thus, it is possible to build an optical network capable of providing a flexible transmission service.
To this end, it is necessary for the above-described optical cross-connect apparatus or the optical ADM to be equipped with a switching system for switching the optical signal channel. That is, the optical cross-connect apparatus requires a switch of a multi-input and multi-output type (so called crosspoint switch) in which WDM signal transmission paths established in a bundle of optical fibers are dynamically switched in the unit of channel. The optical ADM requires a crosspoint switch capable of diverting an optical signal of all the channels from the main channel so as to switch the connection destination.
As for the crosspoint switch, a type of optical (space) switch is now under research and development in which the channel switching can be carried out with maintaining the mode of the signal as an optical signal. As one representative optical switch, named is a PI-LOSS (Path-independent Insertion on Loss) type optical switch. The PI-LOSS type optical switch has an arrangement in which, as for example shown in FIG. 24, a plurality of optical waveguides 101 are formed on a substrate 100 so that they cross one another at crosspoints (Sxy:1xe2x89xa6xxe2x89xa64, 1xe2x89xa6yxe2x89xa64) and temperatures at the crosspoints are controlled to change the refractive index at the crosspoint, whereby the optical signal path is switched.
In more specifically, the temperature of the crosspoints are controlled so that only one of the crosspoints Sxy of the optical path 101 becomes the bar status and all other crosspoints of the optical path 101 become the cross status. Thus, optical signals sent to an input highway #x can be outputted to an output highway #y. For example, if only the crosspoint S12 (x=1, y=2) is controlled to be the bar status, the optical signal sent to the input highway #1 will pass through a path indicated with a bold solid line shown in FIG. 24 and finally outputted at the output highway #2.
That is, according to the above-described PI-LOSS type optical switch, each of the crosspoints Sxy is formed into a switch cell of a two-input two-output type, and the switch cells are arrayed and interconnected one another to form a matrix of four rows and four columns (4xc3x974). Then, one of the switch cells Sxy is controlled to be the bar status in its connecting status, thus any one of the input highway #x can be connected to any output highway #y.
Since the PI-LOSS type optical switch has the arrangement described above, the following merits can be obtained, for example.
{circle around (1)} The number of crosspoints (switch cell) Sxy that the optical signal undergoes becomes constant (four in the example shown in FIG. 24) regardless of choice of the optical path. Therefore, the optical signal from the input terminal to any of the output highway #y through each path is subjected to the same amount of loss, with the result that there is no scattering expected in the optical signal level deriving from each of the output highway #y.
{circle around (2)} Since the switch cells Sxy are interconnected one another byway of the optical waveguides 101, crosstalk between paths can be effectively suppressed.
The above-described PI-LOSS type optical switch of a size of 8xc3x978 is brought into a practical application stage. The PI-LOSS type optical switch is arranged as a non-blocking type switch.
On the other hand, a crosspoint switch made of an electronic circuit (hereinafter sometimes referred to as simply xe2x80x9celectric switchxe2x80x9d) is placed under research and development by manufactures. This is because if the network employs the optical cross-connect apparatus or the optical ADM, in order to compensate the loss of the signal caused in the process of signal transmission, the received signal is often once received and terminated by a receiver within the apparatus so that the optical signal is converted into an electric signal. Thus, there is a circumstance that the electric switch is more applicable than the optical switch.
The most popular type of the electric switch has a mesh structure (lattice arrangement with N inputs and G outputs: N and G are integers greater than 1) as for example shown in FIG. 25. The above electric switch has advantages that it can be manufactured with ease to be more small-sized, less expensive and lower electric consumption as compared with the above-introduced optical switch. Now, electric switch 200 having 16xc3x9716 input and output ports capable of dealing with a signal of ten gigabit (Gb/s) at an ultrahigh rate is under the stage of research and development.
Incidentally, if a large-sized (large capacity) optical network mainly composed of a WDM system of multi-wavelength (e.g., 32 wavelengths or more are simultaneously transmitted per fiber) is requested to build, the crosspoint switch employed in the above-described situation is requested to deal with a signal of an ultra-high bit-rate (10 Gb/s) whichever the signal is of the optical mode or electric mode. Further, the crosspoint switch is requested to be independent of the signal bit-rate. For example, if the network employs the optical ADM, the crosspoint switch utilized in the network shall be arranged to have at least 16xc3x9716 input and output terminals. If the network employs the optical cross-connect apparatus, the crosspoint switch utilized in the network shall be arranged to have at least 512xc3x97512 input and output terminals.
However, as has been described above, as the crosspoint switch which can deal with a signal of an ultra-high bit-rate (about 10 Gb/s) and arranged as a single-stage link arrangement, the largest crosspoint switch that has been successfully developed so far, has only 8xc3x978 or 16xc3x9716 input and output terminals. Thus, it is very difficult to realize a crosspoint switch having a larger number of input and output terminals.
For example, if the crosspoint switch is formed as an optical switch (PI-LOSS type switch), when the optical signal undergoes the crosspoint Sxy of the optical waveguide 101, the signal level will be decreased. Which fact makes it difficult to make the system into a multi-channel arrangement. In order to solve the problem, any amplifying function such as an optical amplifier or the like may be inserted at the input or output port of each channel. However, it is expensive to build such an arrangement, and further the size of the apparatus becomes large and electric power consumption is increased.
Since the PI-LOSS type optical switch employs the optical waveguide 101, the substrate 100 supporting the optical waveguides necessarily becomes long, which fact prevents the PI-LOSS type optical switch from being small-sized. Therefore, it is difficult to construct a switch having a large number of channels. Further, as has been described above, since the switching control is carried out by changing the temperature of the crosspoint, a temperature controller or the like is necessary for each crosspoint Sxy, which fact makes the overall arrangement of the switch large. Thus, it is also difficult to construct a switch having a large number of channels.
Recently, the crosspoint switch comes to be requested to have a point-to-multipoint communication function (e.g., a function that one input is distributed to two or more outputs) in addition to the above-described cross-connection or bar-connection. However, because of a reason that it is not easy to compensate the optical loss caused upon distributing the optical signal or some other reason, it is difficult to realize such a point-to-multipoint communication function.
On the other hand, if the electric switch 200 having the mesh structure as shown in FIG. 25 is employed in the communication network, the number of electric switches the signal transmission path undergoes will differ for each channel. Therefore, the larger the channel size becomes, the greater difference will be caused in the signal transmission time, an output waveform and so on between the channels. Further, since the electric switch 200 employs electric wiring, if the size of channel is made large, there is caused a large influence of the strayed capacity and inductance of the wiring, the capacitive coupling caused between three-dimensionally intersected wires and so on. Therefore, it becomes extremely difficult to stabilize the characteristic of the signal transmitted at an ultrahigh bit-rate such as 10 Gb/s. Further, large influence can be expected from crosstalk between the wires.
Therefore, if the crosspoint switch is arranged as a single body arrangement (hereinafter referred to as a unit switch), then it is difficult to make the unit switch have a multi-channel arrangement of about 512xc3x97512 input and output terminals whichever the crosspoint switch is designed to deal with an optical signal or an electric signal.
One of possible arrangements for solving the above problem is an arrangement, as for example shown in FIG. 26, in which a plurality of unit switches 300 are interconnected to one another to form a multistage arrangement (multistage link arrangement) like a switch arrangement utilized in an exchanger or the like. This arrangement is one possible choice to increase the number of channels that the switching system can deal with. In this case, however, wire connection between the unit switch becomes very complicated. That is, great number of three-dimensional wire crossing is necessary, with the result that it becomes impossible to design the switching system with a simple plain interconnection.
When an ultra-high bit-rate signal of about 10 Gb/s is transmitted within the switching system, the unit switches shall be connected through a coaxial cable, an optical fiber or the like. When the connecting components are connected in a complicated wiring manner, very large space is required, or the size of the apparatus becomes large, with the result that it becomes difficult to make the apparatus small. Further, wiring work requires a lot of labor and a large number of steps, that is, assembling and manufacturing processes will also become difficult. Accordingly, it becomes difficult to make the apparatus with a small cost, which fact makes the apparatus unsuitable for mass-production. Furthermore, it is difficult for the arrangement to flexibly respond to the request to increase the number of channels.
The present invention is made in view of the above aspect, and the object of the present invention is to provide a crosspoint switch circuit which can easily and flexibly respond to a request of extensively increasing the channel size under a minimum space limitation, and which can be assembled and manufactured with ease. Another object of the present invention is to provide a switch cell electronic circuit which can offer a stable characteristic or the like for a point-to-multipoint communication or a ultrahigh bit-rate signal transmission.
According to the present invention, in order to attain the above object, there is provided a crosspoint switch circuit including a plurality of switch cells arrayed in a matrix fashion to form a matrix array, each of the switch cells being formed of a two-input and two-output type switch having a first and second input terminals and a first and second output terminals in which either of the input terminals is made connectable to any of the output terminals, and each of the switch cells being interconnected and controlled in each connecting status so that any one of input lines is made connectable to any of output lines, and also including external connecting means provided on each side of the matrix array so that the switch cells arrayed on each side of the matrix array are made connectable to switch cells arrayed on any side of a matrix array of another crosspoint switch which is to neighbor that crosspoint switch circuit. The crosspoint switch circuit is hereinafter sometimes referred to as a xe2x80x9cunit switch circuitxe2x80x9d.
Further, according to the present invention, there is provided a crosspoint switch circuit array in which a plurality of the above crosspoint switch circuits are arrayed in a matrix form and interconnected one another by means of the above external connecting means. The crosspoint switch circuit array is hereinafter sometimes referred to as a xe2x80x9cunit switch circuit groupxe2x80x9d.
Each of the above crosspoint switch circuit constituting the crosspoint switch circuit array includes a plurality of switch cells arrayed in a matrix fashion to form a matrix array, each of the switch cells being formed of a two-input and two-output type switch having a first and second input terminals and a first and second output terminals in which either of the input terminals is made connectable to any of the output terminals, and each of the switch cells being interconnected and controlled in each connecting status so that any one of the input lines is made connectable to any of the output lines, and also includes external connecting means provided on each side of the matrix array so that the switch cells arrayed on each side of the matrix array are made connectable to switch cells arrayed on any side of a matrix array of another crosspoint switch which is to neighbor that crosspoint switch circuit.
According to the above present invention, since the external connecting means is provided on each side of the matrix array, the crosspoint switch circuit is made connectable to the switch cells arrayed on any side of the matrix array of another crosspoint switch which is to neighbor that crosspoint switch circuit. Therefore, the crosspoint switch circuit, or the unit switch circuit can be connected to one another to form a crosspoint switch circuit array of a planar arrangement so that the number of input lines (input highway) is increased upon necessity. In other words, the number of input lines can be increased for flexibly extending the circuit arrangement. Moreover, a complicated wiring such as a wiring in a three-dimensional manner becomes unnecessary. Therefore, it is possible to realize a crosspoint switch circuit or a crosspoint switch circuit array having a large number of input and output terminals very easily with low cost.
Further, according to the present invention, there is provided a crosspoint switch circuit array system in which a plurality of the above crosspoint switch circuit arrays are arrayed in a matrix form and interconnected to one another by means of the above external connecting means. The crosspoint switch circuit array system is arranged in a three-dimensional fashion. The crosspoint switch circuit array system may hereinafter be referred to as a xe2x80x9cthree-dimensionally arranged switch circuitxe2x80x9d.
Therefore, if the number of the crosspoint switch circuits is increased to increase the input and output terminals, the size of the crosspoint switch array can become too large. In this case, if the crosspoint switch circuit array composed of a number of crosspoint switch circuits are interconnected and arranged three-dimensionally, a crosspoint switch circuit array having a large number of input and output terminals having a simple arrangement can be realized.
In this case, the crosspoint switch circuit arrays may be interconnected to one another at each external connecting means through a flat cable to form the three-dimensionally arranged switch circuit.
According to the above arrangement, since the crosspoint switch circuit arrays are interconnected through the flat cable, complicated wiring work can be obviated. Therefore, the crosspoint switch circuit array or the crosspoint switch circuit array system can be assembled and manufactured with ease and hence it becomes possible to manufacture the crosspoint switch array system in a mass-production manner. As a result, it becomes possible to provide a crosspoint switch circuit having a large number of input and output terminals at an extremely low cost.
If the above crosspoint switch circuit (unit switch circuit) is composed of the mxc3x97n switch cells arrayed in a matrix form having m columns and n rows (m and n are each an integer larger than one), the external connecting means may be formed of input terminal circuits and output terminal circuits having arrangements as descried in the following items (1) to (16).
(1) nxe2x88x921 first output terminal circuits each for making the first output terminal of the switch cell positioned at the jth (1xe2x89xa6jxe2x89xa6nxe2x88x921) column of a first row of the matrix connectable to the second input terminal of the switch cell positioned at the j+1th column of the mth row of the matrix of a first different crosspoint switch circuit.
(2) nxe2x88x921 first input terminal circuits for making the first input terminal of the switch cell positioned at j+1th column of the first row of the matrix connectable to the second output terminal of the switch cell positioned at jth column of the mth row of the matrix of the first different crosspoint switch circuit.
(3) nxe2x88x921 second output terminal circuits for making the second output terminal of the switch cell positioned at jth column of the mth row of the matrix connectable to the first input terminal of the switch cell positioned at j+1th column of a first row of the matrix of a second different crosspoint switch circuit.
(4) nxe2x88x921 second input terminal circuits for making the second input terminal of the switch cell positioned at the j+1th column of the mth row of the matrix connectable to the first output terminal of the switch cell positioned at the jth column of the first row of the matrix of the second different crosspoint switch circuit.
(5) mxe2x88x921 third input terminal circuits for making the second input terminal of the switch cell positioned at the first column of the ith (1xe2x89xa6ixe2x89xa6mxe2x88x921)row of the matrix connectable to the first output terminal of the switch cell positioned at nth column of an i+1th row of the matrix of a third different crosspoint switch circuit.
(6) mxe2x88x921 fourth input terminal circuits for making the first input terminal of the switch cell positioned at the first column of the i+1th row of the matrix connectable to the second output terminal of the switch cell positioned at nth column of the ith row of the matrix of the third different crosspoint switch circuit.
(7) mxe2x88x921 third output terminal circuits for making the second output terminal of the switch cell positioned at the nth column of the ith row of the matrix connectable to the first input terminal of the switch cell positioned at first column of an i+1th row of the matrix of a fourth different crosspoint switch circuit.
(8) mxe2x88x921 fourth output terminal circuits for making the first output terminal of the switch cell positioned at the nth column of the i+1th row of the matrix connectable to the second output terminal of the switch cell positioned at the first column of the ith row of the matrix of the fourth different crosspoint switch circuit.
(9) A single fifth input terminal circuit connectable to the first output terminal of the switch cell positioned at the nth column of the first row of the matrix of the third different crosspoint switch circuit.
(10) A single fifth output terminal circuit connected to the fifth input terminal circuit and connectable to the second input terminal of the switch cell positioned at the first column of the nth row of the matrix of the first different crosspoint switch circuit.
(11) A single sixth input terminal circuit connectable to the second output terminal of the switch cell positioned at the nth column of the mth row of the matrix of the third different crosspoint switch circuit.
(12) A single sixth output terminal circuit connected to the sixth input terminal circuit and connectable to the first input terminal of the switch cell positioned at the first column of the first row of the matrix of the second different crosspoint switch circuit.
(13) A single seventh input terminal circuit for making the first input terminal of the switch cell positioned at the first column of the first row of the matrix connectable to the sixth output terminal circuit of the first different crosspoint switch circuit.
(14) A single eighth input terminal circuit for making the second input terminal of the switch cell positioned at the first column of the mth row of the matrix connectable to the fifth output terminal circuit of the second different crosspoint switch circuit.
(15) A single seventh output terminal circuit for making the first output terminal of the switch cell positioned at the nth column of the first row of the matrix connectable to the fifth input terminal circuit of the fourth different crosspoint switch circuit.
(16) A single eighth output terminal circuit for making the second output terminal of the switch cell positioned at the nth column of the mth row of the matrix connectable to the sixth input terminal circuit of the fourth different crosspoint switch circuit.
If the external connecting means is formed of the above-described first to eighth input terminal circuits and first to eighth output circuits, a crosspoint switch circuit can be positively connected with at maximum four different crosspoint switch circuits neighboring that crosspoint switch circuit in a planar arrangement.
The crosspoint switch circuit may be arranged such that if the crosspoint switch circuit is not connected with the first different crosspoint switch circuit, then the fifth output terminal circuit and the seventh input terminal circuit on the side of the first input terminal of the switch cell positioned at the first column of the first row are connected to each other while the first output terminal circuit on the side of the first output terminal of the switch cell positioned at the jth column of the first row and the first input terminal circuit on the side of the first input terminal of the switch cell positioned at the j+1th column of the first row are connected to each other.
According to the above arrangement, if the crosspoint switch circuit is not connected with another crosspoint circuit at the side of the first row (for example, a unit switch circuit positioned at the first row among the unit switch circuit group composed of the plurality of crosspoint switch circuits arrayed in a matrix form), then the fifth output terminal circuit and the seventh input terminal circuit are connected to each other while the first output terminal circuit and the first input terminal circuit are connected to each other. Therefore, the first input terminal and the first output terminal of the switch cell positioned on the first row are connected to each other, with the result that a signal transmission path is secured for a signal inputted to the switch cell positioned on the first row, guaranteeing a normal input and output highway connection.
The crosspoint switch circuit may be arranged such that if the crosspoint switch circuit is not connected with the second different crosspoint switch circuit, then the sixth output terminal circuit and the eighth input terminal circuit on the side of the second input terminal of the switch cell positioned at the first column of the mth row are connected to each other while the second output terminal circuit on the side of the second output terminal of the switch cell positioned at the jth column of the mth row and the second input terminal circuit on the side of the second input terminal of the switch cell positioned at the j+1th column of the mth row are connected to each other.
According to the above arrangement, if the crosspoint switch circuit is not connected with another crosspoint circuit at the side of the mth row (for example, a unit switch circuit positioned at the mth row among the unit switch circuit group composed of the plurality of crosspoint switch circuits arrayed in a matrix form), then the sixth output terminal circuit and the eighth input terminal circuit are connected to each other while the second output terminal circuit and the second input terminal circuit are connected to each other. Therefore, the second input terminal and the second output terminal of the switch cell positioned on the mth row are connected to each other, with the result that a signal transmission path is secured for a signal inputted to the switch cell positioned on the mth row, guaranteeing a normal input and output highway connection.
The crosspoint switch circuit may be arranged such that the third to sixth input terminal circuits are provided on one side corresponding to the first column of the matrix array, the third, fourth, seventh and eighth output terminal circuits are provided on one side corresponding to the nth column of the matrix array, the first and seventh input terminal circuits and the first and fifth output terminal circuits are provided on one side corresponding to the first row of the matrix array, and the second and eighth input terminal circuits and the second and sixth output terminal circuits are provided on one side corresponding to the mth row of the matrix array.
According to the above arrangement, a crosspoint switch circuit can be connected with at maximum four other crosspoint switch circuits which are to neighbor that crosspoint switch circuit at each side in a planar arrangement. This arrangement is effectively utilized particularly in a case where the switch cell is formed of an electronic circuit, because wiring work and circuit integration can be carried out with ease.
If the switch cell is formed of the electronic circuit as described above, the following advantages can be obtained.
{circle around (1)} Since signal distribution can be carried out with ease, a stable point-to-multipoint connection can be realized with ease.
{circle around (2)} Since the switch cells can be integrated on a semiconductor chip, circuit miniaturization can be remarkably progressed as compared with the switch cells using an optical waveguide such as an optical switch or the like.
{circle around (3)} It is not necessary to provide an external circuit such as a temperature controller for each switch cell unlike the optical switch using the optical waveguide. Therefore, the switch can be remarkably small-sized and the electric consumption thereof can also be remarkably reduced.
{circle around (4)} Since the switch cell can be electrically connected to an external circuit (e.g., another switch cell, an output terminal circuit, an input terminal circuit), it is not necessary to arrange a complicated optical coupling with an optical fiber or the like.
Each of the above input terminal circuits may be provided on one side of the first row while each of the above output terminal circuits may be provided on one side of the nth row of the matrix array. In this case, connection between the unit switch cells in a three-dimensional fashion may be unavoidable. However, the bending angle of wires of the input and output terminals within the unit switch cell can be made small. Therefore, the above arrangement is particularly effective if the switch cell is formed of an optical circuit. That is, influence caused from an optical loss due to the bending of the wire (e.g., optical waveguide or the like) can be suppressed to a minimum level.
Meanwhile, if the above switch cell is formed of an electronic circuit (such as the switch cell electronic circuit of the present invention), the switch cell may be formed of a first electronic switch unit for electrically connecting the first input terminal to either or both of the first and second output terminals and a second electronic switch unit for electrically connecting the second input terminal to either or both of the first and second output terminals.
According to the above arrangement, the following connections of items of {circle around (1)} to {circle around (4)} can be realized. Therefore, great contribution can be expected for realizing a multifunctional crosspoint switch circuit having a flexible utility.
{circle around (1)} cross connection (connection between the first input terminal and the second output terminal, connection between the second input terminal to the first output terminal).
{circle around (2)} bar connection (connection between the first input terminal and the first output terminal, connection between the second input terminal to the second output terminal).
{circle around (3)} point-to-multipoint connection (connection from the first input terminal to first and second output terminals).
{circle around (4)} point-to-multipoint connection (connection from the second input terminal to first and second output terminals).
In more concretely, for example, the switch cell may include a first input circuit having a first transistor with the base grounded and a first load resistor connected to a collector of the first transistor, the emitter of the first transistor being provided as the first input terminal, a second input circuit having a second transistor with the base grounded and a second load resistor connected to a collector of the second transistor, the emitter of the second transistor being provided as the second input terminal, and first to fourth output current switch circuits each having a third and fourth transistors with respective emitters connected to each other to form a differential arrangement, the first and second output current switch circuits forming the first electronic switch unit while the third and fourth output current switch circuits forming the second electronic switch unit. The switch cell may be arranged such that the third transistor of the first output current switch circuit and the fourth transistor of the third output current switch circuit are connected in parallel at each collector to form the first output terminal, while the third transistor of the second output current switch circuit and the fourth transistor of the fourth output current switch circuit are connected in parallel at each collector to form the second output terminal, the respective fourth transistors of the first and second output current switch circuits are connected in parallel at each base to the first load resistor of the first input circuit, the respective third transistors of the third and fourth output current switch circuits are connected in parallel at each base to the second load resistor of the second input circuit, and that currents flowing through the first to fourth output current switch circuits are controlled, whereby the connecting status representing the connection between the first and second input terminals and the first and second output terminals is changed.
Further, the switch cell may further include first to fourth current source circuits each having a fifth transistor of which collector is connected to one of the first to fourth output current switch circuits, and of which emitter is connected to a third load resistor, wherein the base potential of each fifth transistor of the current source circuit is independently controlled, whereby currents flowing through the first to fourth output current switch circuits are controlled.
Further, the above switch cell may include a third input current switch circuit, serving as the first electronic switch, having sixth and seventh transistors of which emitters are connected in parallel to form the first input terminal, a fourth input current switch circuit, serving as the second electronic switch, having eighth and ninth transistors of which emitters are connected in parallel to form the second input terminal, a fourth load resistor connected to each collector of the sixth and eighth transistors in a parallel fashion, a fifth load resistor connected to each collector of the seventh and ninth transistors in a parallel fashion, a fifth output current switch circuit having tenth and eleventh transistors connected to each other through the respective emitters to form a differential arrangement, the collector of the tenth transistor being provided as the first output terminal, and the base of the eleventh transistor being connected to the fourth load resistor, and a sixth output current switch circuit having twelfth and thirteenth transistors connected to each other through the respective emitters to form a differential arrangement, the collector of the twelfth transistor being provided as the second output terminal, and the base of the thirteenth transistor being connected to the fifth load resistor. The switch cell may be arranged such that each base potential of the sixth to ninth transistors is independently controlled so that the connecting status representing the connection between the first and second input terminals and the first and second output terminals can be changed.
As described above, if the switch cell is implemented to have a couple of output current switch circuits each having transistors in correspondence with each of the output terminals, the switch cell can have a signal amplifying function. Therefore, the signal level decrease can be suppressed at a minimum level. Accordingly, if a number of crosspoint switch circuits are arranged to form a large-sized crosspoint switch circuit system and a signal is supplied thereto, it can be expected that the signal level or the waveform of the signal can be satisfactorily maintained between the input and output highway. Further, since the above-mentioned connection can be changed by switching the electric current signal, the circuit can be operated at a high speed with stability. Furthermore, a number of the crosspoint switch circuits can be fabricated on a small chip in an integrated fashion, great contribution can be expected on characteristic stability against a high rate signal, small-sizing of the circuit system, the characteristic stability of the crosspoint switch circuit, and small-sizing thereof.
In this case, if the first input terminal of the subject switch cell and the second output terminal of another switch cell (alternatively, the second input terminal of the subject switch cell and the first output terminal of another switch cell) are connected to each other, a cascode interface circuit is formed. Therefore, durability against capacitive coupling or the like due to the wiring between the switch cells is improved, leading to more stable characteristic against high rate signal transmission.
If the input (current switch) circuit, each of the input terminals and each of the output terminals are formed into a differential arrangement, the following advantages can be obtained.
{circle around (1)} Influence deriving from switching noise can be suppressed.
{circle around (2)} The switching circuits can be fabricated into semiconductor integrated circuits with ease.
{circle around (3)} Stability against fluctuation in the temperature or the power supply voltage can be improved.
{circle around (4)} When a high bit-rate signal is supplied thereto to drive the circuit at high speed, the power supply current amount within the circuit can be prevented from fluctuation. Thus, the circuit can be operated at a high speed with stability, and it is possible to suppress influence on other circuits.
{circle around (5)} The multilevel wiring between the switch cells becomes a multilevel wiring formed of a signal wiring of a differential arrangement. Thus, crosstalk between the signals transmitted at the multilevel wiring point can be more suppressed.
Further, the above switch cell may be arranged to have a first current switch control circuit for allowing a current to be flowed in only one of the first and third output current switch circuits, and a second current switch control circuit for allowing a current to be flowed in only one of the second and fourth output current switch circuits.
According to the above arrangement, the current flowing in each of the four sets of output current switch circuits is controlled by two sets of the current switch control circuits. Therefore, current switching of the output current switch circuit can be carried out at each couple of output current switch circuit, and hence erroneous switching operation can be prevented from occurring.